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drm/amd/display: dmcu wait loop calculation is incorrect in RV
authorPaul Hsieh <paul.hsieh@amd.com>
Tue, 7 Apr 2020 09:18:47 +0000 (17:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 22 Apr 2020 22:11:48 +0000 (18:11 -0400)
commit7fc5c319efceaed1a23b7ef35c333553ce39fecf
tree3f92def7721918ed0e3aa870f47fc9aed25fea87
parent904fb6e0f4e8158e6db1e21c3c97bdc238e537f5
drm/amd/display: dmcu wait loop calculation is incorrect in RV

[Why]
Driver already get display clock from SMU base on MHz, but driver read
again and mutiple 1000 cause wait loop value is overflow.

[How]
remove coding error

Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c