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radv: for stencil only set Z tile mode index to same value
authorDave Airlie <airlied@redhat.com>
Thu, 27 Jul 2017 03:51:48 +0000 (04:51 +0100)
committerDave Airlie <airlied@redhat.com>
Fri, 28 Jul 2017 03:12:32 +0000 (04:12 +0100)
commit800d1622096ca52b955bdfc20eb770b80ef15221
treec6a50d0be6d8a9a24e3b88353e98e96bd554413e
parent554aa094406f3f5a935c4adbe77569cc9beb4312
radv: for stencil only set Z tile mode index to same value

On SI this was causing a hang in
dEQP-VK.pipeline.render_to_image.core.2d_array.mipmap.r16g16_sint_s8_uint

This was due to not handling the tile mode index for depth like
I fixed previously for new GPUs.

Fixes: 01d0c5a9 (radv: fix stencil regression since new addrlib import)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/vulkan/radv_device.c