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[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
authorDavid Green <david.green@arm.com>
Fri, 22 Feb 2019 12:23:31 +0000 (12:23 +0000)
committerDavid Green <david.green@arm.com>
Fri, 22 Feb 2019 12:23:31 +0000 (12:23 +0000)
commit81d4da9bf0d4f60651d9bfafdaa88fc1881dc1b2
tree8e4ddc01b3019250cae7eed6bf5385c3dd00c5a8tree | snapshot
parent1d53cf7ef3397d91f5a1310e0c4542e7b8c4b682commit | diff
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs

This adds a number of missing Thumb1 opcodes so that the peephole optimiser can
remove redundant CMP instructions.

Reapplying this after the first attempt broke non-thumb1 code as the t2ADDri
instruction can be used with frame indices. In thumb1 we use tADDframe.

Differential Revision: https://reviews.llvm.org/D57833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354667 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
test/CodeGen/ARM/intrinsics-overflow.ll diff | blob | history
test/CodeGen/Thumb/peephole-cmp.mir [new file with mode: 0644] blob
test/CodeGen/Thumb2/peephole-cmp.mir [new file with mode: 0644] blob
external/llvm
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