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author	Ulrich Weigand <ulrich.weigand@de.ibm.com>
	Wed, 10 May 2017 14:20:15 +0000 (14:20 +0000)
committer	Ulrich Weigand <ulrich.weigand@de.ibm.com>
	Wed, 10 May 2017 14:20:15 +0000 (14:20 +0000)
commit	81fa691fd60e4cc7b5f5bf9b06e1e8f520ac20f7
tree	41fd629a987c53f15df8a0c095763c00b0017248	tree \| snapshot
parent	c12fbb0eea8167280bc98c34e38e2e589aee9037	commit \| diff

[SystemZ] Add miscellaneous instructions

This adds a few missing instructions for the assembler and
disassembler. Those should be the last missing general-
purpose (Chapter 7) instructions for the z10 ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302667 91177308-0d34-0410-b5e6-96231b3b80d8

external/llvm

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lib/Target/SystemZ/SystemZInstrFormats.td		diff \| blob \| history
lib/Target/SystemZ/SystemZInstrInfo.td		diff \| blob \| history
lib/Target/SystemZ/SystemZScheduleZ13.td		diff \| blob \| history
lib/Target/SystemZ/SystemZScheduleZ196.td		diff \| blob \| history
lib/Target/SystemZ/SystemZScheduleZEC12.td		diff \| blob \| history
test/MC/Disassembler/SystemZ/insns.txt		diff \| blob \| history
test/MC/SystemZ/insn-bad.s		diff \| blob \| history
test/MC/SystemZ/insn-good.s		diff \| blob \| history