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[ARM] Don't shrink STM if it would cause an unknown base register store
authorJohn Brawn <john.brawn@arm.com>
Wed, 22 Apr 2020 11:07:15 +0000 (12:07 +0100)
committerJohn Brawn <johbra01@e107984-lin.cambridge.arm.com>
Wed, 22 Apr 2020 13:50:42 +0000 (14:50 +0100)
commit8211cfb7c8bd1bedd5b3ed936d5b8f784c6bfd21
tree0c0dae2b43d983aa103ec21d5b8c4618acb853cb
parent41d52662d54b693c417cb0f6eb8a768672f58a8e
[ARM] Don't shrink STM if it would cause an unknown base register store

If a 16-bit thumb STM with writeback stores the base register but it isn't the
first register in the list, then an unknown value is stored. The load/store
optimizer knows this and generates a 32-bit STM without writeback instead, but
thumb2 size reduction converts it into a 16-bit STM. Fix this by having thumb2
size reduction notice such STMs and leave them as they are.

Differential Revision: https://reviews.llvm.org/D78493
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
llvm/test/CodeGen/Thumb/stm-deprecated.ll