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RISC-V: KVM: Refine __kvm_riscv_switch_to() implementation
authorVincent Chen <vincent.chen@sifive.com>
Wed, 23 Feb 2022 01:13:31 +0000 (09:13 +0800)
committerAnup Patel <anup@brainfault.org>
Fri, 11 Mar 2022 13:32:22 +0000 (19:02 +0530)
commit823f53a30eb004d30762f56acfc973ecba1662fd
treeda78c08920814bed26ca30f732a7e299b8258ce0
parentafec0c65d09d8fd6bba3e936e95fe6a60b78e001
RISC-V: KVM: Refine __kvm_riscv_switch_to() implementation

Kernel uses __kvm_riscv_switch_to() and __kvm_switch_return() to switch
the context of host kernel and guest kernel. Several CSRs belonging to the
context will be read and written during the context switch. To ensure
atomic read-modify-write control of CSR and ordering of CSR accesses, some
hardware blocks flush the pipeline when writing a CSR. In this
circumstance, grouping CSR executions together as much as possible can
reduce the performance impact of the pipeline. Therefore, this commit
reorders the CSR instructions to enhance the context switch performance..

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Suggested-by: Hsinyi Lee <hsinyi.lee@sifive.com>
Suggested-by: Fu-Ching Yang <fu-ching.yang@sifive.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/vcpu_switch.S