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drm/msm/dpu: Add more of the INTF interrupt regions
authorBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 23 Nov 2021 15:40:49 +0000 (07:40 -0800)
committerRob Clark <robdclark@chromium.org>
Tue, 30 Nov 2021 00:19:58 +0000 (16:19 -0800)
commit89688e2119b2c9e7ba0c1833a663b7e3a011861d
treec276d4914b8af9783d529ad49348bb281db2d46f
parentfabae667b1263216be53e0230cd3966a9a1963a4
drm/msm/dpu: Add more of the INTF interrupt regions

In addition to the other 7xxx INTF interrupt regions, SM8350 has
additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
these. The 7xxx naming scheme of the bits are kept for consistency.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/20211123154050.40984-1-bjorn.andersson@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h