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AMDGPU/GlobalISel: Fixed handling of non-standard vectors
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Thu, 21 May 2020 19:41:29 +0000 (12:41 -0700)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Wed, 27 May 2020 22:44:09 +0000 (15:44 -0700)
commit8aa81aaebe533d0721f1c00deeb0fc452b0147a5
tree40f9950eded1b260bc85b3c628ff7d13beda16b5
parentbe6bffe7293c63ec874aaf21b4f768dd3f77380a
AMDGPU/GlobalISel: Fixed handling of non-standard vectors

We do not have register classes for all possible vector
sizes, so round it up for extract vector element.

Also fixes selection of G_MERGE_VALUES when vectors are
not a power of two.

This has required to refactor getRegSplitParts() in way
that it can handle not just power of two vectors.

Ideally we would like RegSplitParts to be generated by
tablegen.

Differential Revision: https://reviews.llvm.org/D80457
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir