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[X86][SSE] Added missing vector logic intrinsic schedules
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 1 Aug 2017 17:51:20 +0000 (17:51 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 1 Aug 2017 17:51:20 +0000 (17:51 +0000)
commit8ae6d2810054e7edaad44ddb0cea1a309afec35b
tree4d96b4e07fad486917a597ece57e93aff5947fdetree | snapshot
parent5250bac12f1322274026f1b80c147bc8abc0c40acommit | diff
[X86][SSE] Added missing vector logic intrinsic schedules

Improves atom scheduler test coverage (to make it easier to upgrade them for PR32431).

Merged SSE_VEC_BIT_ITINS_P + SSE_BIT_ITINS_P as we were interchanging between them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309715 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/CodeGen/X86/sse-schedule.ll diff | blob | history
test/CodeGen/X86/sse2-schedule.ll diff | blob | history
external/llvm
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