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[PowerPC] reduce rotate in BitPermutationSelector
authorHiroshi Inoue <inouehrs@jp.ibm.com>
Tue, 5 Jun 2018 11:58:01 +0000 (11:58 +0000)
committerHiroshi Inoue <inouehrs@jp.ibm.com>
Tue, 5 Jun 2018 11:58:01 +0000 (11:58 +0000)
commit8b13d9fafa15ed8290ed01b37fe02a2a3063551a
treed0ec47447dfc5fed1703d11d84ee4e8275aaeb5d
parenta518a5e97ec05be53fa53734c3ae3807006b82fe
[PowerPC] reduce rotate in BitPermutationSelector

BitPermutationSelector builds the output value by repeating rotate-and-mask instructions with input registers.
Here, we may avoid one rotate instruction if we start building from an input register that does not require rotation.

For example of the test case bitfieldinsert.ll, it first rotates left r4 by 8 bits and then inserts some bits from r5 without rotation.
This can be executed by one rlwimi instruction, which rotates r4 by 8 bits and inserts its bits into r5.

This patch adds a check for rotation amounts in the comparator used in sorting to process the input without rotation first.

Differential Revision: https://reviews.llvm.org/D47765

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334011 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
test/CodeGen/PowerPC/bitfieldinsert.ll [new file with mode: 0644]