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[X86][AVX512DQ] Enable v16i16 vector shifts to use an extend+shift+truncate pattern.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 9 Jan 2017 15:15:45 +0000 (15:15 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 9 Jan 2017 15:15:45 +0000 (15:15 +0000)
commit8b3491ba11b0d35ed31e8b57f5c3e6a30192812d
tree2b238165f0345dd27bba6999c78c20795505a198
parent077d763679a78893cb79f8940c6b6321a7140000
[X86][AVX512DQ] Enable v16i16 vector shifts to use an extend+shift+truncate pattern.

Use the existing AVX2 v8i16 vector shift lowering for v16i16 on AVX512 targets (AVX512BW will have already have lowered with vpsravw).

Cost model updates to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291445 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/vector-shift-ashr-256.ll
test/CodeGen/X86/vector-shift-ashr-512.ll
test/CodeGen/X86/vector-shift-lshr-256.ll
test/CodeGen/X86/vector-shift-lshr-512.ll
test/CodeGen/X86/vector-shift-shl-256.ll
test/CodeGen/X86/vector-shift-shl-512.ll