[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI

[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI

Summary:
Affected instructions:
PseudoLI simplest form (ADDI with X0)
ALU operations with immediate (they do not set status flag - ADDI, ORI, XORI)

Reviewers: asb

Reviewed By: asb

Subscribers: shiva0217, rkruppe, kito-cheng, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei

Differential Revision: https://reviews.llvm.org/D56526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352010 91177308-0d34-0410-b5e6-96231b3b80d8