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author	Craig Topper <craig.topper@gmail.com>
	Sat, 7 Jan 2017 22:20:34 +0000 (22:20 +0000)
committer	Craig Topper <craig.topper@gmail.com>
	Sat, 7 Jan 2017 22:20:34 +0000 (22:20 +0000)
commit	8c5dd44736cae5c24518d5e2e2b73b5c256f6aca
tree	c481e4dff2de9e57d263ce3e512d905572c695ee	tree \| snapshot
parent	2f7920212d9e462912ff1b865e961fb259c2b0c5	commit \| diff

[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.

We should probably teach the two address instruction pass to turn masked moves into BLENDM when its beneficial to the register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291371 91177308-0d34-0410-b5e6-96231b3b80d8

13 files changed:

external/llvm

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lib/Target/X86/X86InstrAVX512.td		diff \| blob \| history
test/CodeGen/X86/avx512-bugfix-23634.ll		diff \| blob \| history
test/CodeGen/X86/avx512-mov.ll		diff \| blob \| history
test/CodeGen/X86/avx512-regcall-NoMask.ll		diff \| blob \| history
test/CodeGen/X86/avx512-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512bw-mov.ll		diff \| blob \| history
test/CodeGen/X86/avx512bw-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512bwvl-mov.ll		diff \| blob \| history
test/CodeGen/X86/avx512bwvl-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512vl-mov.ll		diff \| blob \| history
test/CodeGen/X86/avx512vl-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/fma-fneg-combine.ll		diff \| blob \| history
test/CodeGen/X86/vector-shuffle-masked.ll		diff \| blob \| history