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[RISCV] AsmParser support for the li pseudo instruction
authorAlex Bradbury <asb@lowrisc.org>
Thu, 7 Jun 2018 15:35:47 +0000 (15:35 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Thu, 7 Jun 2018 15:35:47 +0000 (15:35 +0000)
commit8c71680c9891dde8f7a2a7c9606ebc3bceb8ef5f
treea7b02edd0b67102c7f5ea7dabf757dc8c8233dd8
parent5cadb75706e2281a6f0f66690a659d3b20db189e
[RISCV] AsmParser support for the li pseudo instruction

The implementation follows the MIPS backend and expands the pseudo instruction
directly during asm parsing. As the result, only real MC instructions are
emitted to the MCStreamer. The actual expansion to real instructions is
similar to the expansion performed by the GNU Assembler.

This patch supersedes D41949.

Differential Revision: https://reviews.llvm.org/D46118
Patch by Mario Werner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334203 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
lib/Target/RISCV/RISCVInstrFormats.td
lib/Target/RISCV/RISCVInstrInfo.td
test/MC/RISCV/rv32c-aliases-valid.s [new file with mode: 0644]
test/MC/RISCV/rv32i-aliases-invalid.s
test/MC/RISCV/rv32i-aliases-valid.s
test/MC/RISCV/rv64c-aliases-valid.s [new file with mode: 0644]
test/MC/RISCV/rv64i-aliases-invalid.s
test/MC/RISCV/rv64i-aliases-valid.s
test/MC/RISCV/rvi-aliases-valid.s