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author	Daniel Sanders <daniel.sanders@imgtec.com>
	Thu, 31 Mar 2016 13:15:23 +0000 (13:15 +0000)
committer	Daniel Sanders <daniel.sanders@imgtec.com>
	Thu, 31 Mar 2016 13:15:23 +0000 (13:15 +0000)
commit	8cd0a25bf452773abe20b05d608b7fb6b30ab719
tree	8f29c7e95e227f0ea5f68e10cc7e768528cd9f79	tree \| snapshot
parent	638cd0356dc0cc8a184191703481f0d5adf2877f	commit \| diff

[mips] Range check simm9 and fix a bug this revealed.

Summary:
The bug was that microMIPS's [ls]w[lr]e instructions claimed to support a
12-bit offset when it is only 9-bit.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265010 91177308-0d34-0410-b5e6-96231b3b80d8

16 files changed:

lib/Target/Mips/AsmParser/MipsAsmParser.cpp		diff \| blob \| history
lib/Target/Mips/MicroMipsInstrInfo.td		diff \| blob \| history
lib/Target/Mips/MipsEVAInstrInfo.td		diff \| blob \| history
lib/Target/Mips/MipsInstrInfo.td		diff \| blob \| history
test/MC/Mips/eva/invalid-noeva-wrong-error.s		diff \| blob \| history
test/MC/Mips/eva/invalid_R6.s		diff \| blob \| history
test/MC/Mips/micromips/invalid.s		diff \| blob \| history
test/MC/Mips/micromips32r6/invalid.s		diff \| blob \| history
test/MC/Mips/mips1/invalid-mips2-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips1/invalid-mips3-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips1/invalid-mips4-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips2/invalid-mips3-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips2/invalid-mips4-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s		diff \| blob \| history
test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s		diff \| blob \| history

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