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[TargetLowering] SimplifyDemandedBits - add ANY_EXTEND_VECTOR_INREG support
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Jun 2019 18:34:58 +0000 (18:34 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Jun 2019 18:34:58 +0000 (18:34 +0000)
commit8f0c7afb49594d54306e2ed7f2c498e0a7a3100b
tree20c9c07efeedef4a8882ab1d5a31e93cdef3883atree | snapshot
parent268a173c5445ed6a052442b31f41df105b78675dcommit | diff
[TargetLowering] SimplifyDemandedBits - add ANY_EXTEND_VECTOR_INREG support

Move 'lowest' demanded elt -> bitcast fold out of ZERO_EXTEND_VECTOR_INREG into ANY_EXTEND_VECTOR_INREG case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363856 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/TargetLowering.cpp diff | blob | history
external/llvm
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