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[X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 31 Aug 2018 16:05:48 +0000 (16:05 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 31 Aug 2018 16:05:48 +0000 (16:05 +0000)
commit8f931c71476d068d831a0fdc97643eedd3721c73
tree5629d43e8cd4ac03efa0e95cbd8c537b3db91aaf
parent3ecff60381eb1d3d94f014e7f800bf093490ab3c
[X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.

The presence of a ReadAdvance for input operand #0 is problematic
because it changes the input latency of the register used as the base address
for the folded load.

A broadcast cannot start executing if the load address hasn't been computed yet.

In the llvm-mca example, the VBROADCASTSS is dependent on the address generated
by the LEAQ.  That means, it cannot start until LEAQ reaches the write-back
stage. If we apply ReadAdvance, then we wrongly assume that the load can start 3
cycles in advance.

Differential Revision: https://reviews.llvm.org/D51534

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341222 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ScheduleBtVer2.td
test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s