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[AArch64] optimise v4f16 fcmps to utilise vector instructions
authorCarey Williams <carey.williams@arm.com>
Mon, 22 Jan 2018 14:16:11 +0000 (14:16 +0000)
committerCarey Williams <carey.williams@arm.com>
Mon, 22 Jan 2018 14:16:11 +0000 (14:16 +0000)
commit95a5df84b6c036e30ae155786d8f5df7f8ee1ff9
tree318aec9288511e96ceab24867ebc1e0e5a91baadtree | snapshot
parent731becc910557bfb9ff5a5a48946a74087a89c86commit | diff
[AArch64] optimise v4f16 fcmps to utilise vector instructions

Improves the code generation for v4f16 FCMP instructions when FullFP16 is not supported.
Generating FCTVL(s) rather than a longer series of FCVTs.

Differential Revision: https://reviews.llvm.org/D41772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323118 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
test/CodeGen/AArch64/fp16-v4-instructions.ll diff | blob | history
external/llvm
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