OSDN Git Service

drm/i915/xehp: Add register for compute engine's MMIO-based TLB invalidation
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 28 Apr 2022 04:19:24 +0000 (21:19 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 29 Apr 2022 21:30:21 +0000 (14:30 -0700)
commit97e17a09063074a2534e8c2f4873588a9aaa48b3
tree66af30a6e82902f22d90ce04b38e7264fc80e53d
parent991b4de3275728fd746ce15e00087fdbd51c29a1
drm/i915/xehp: Add register for compute engine's MMIO-based TLB invalidation

Compute engines have a separate register that the driver should use to
perform MMIO-based TLB invalidation.

Note that the term "context" in this register's bspec description is
used to refer to the engine instance (in the same way "context" is used
on bspec 46167).

Bspec: 43930
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220428041926.1483683-3-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_gt.c
drivers/gpu/drm/i915/gt/intel_gt_regs.h