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Introduce "just interpret" chainable pseudo-translation.
authorBill Buzbee <buzbee@google.com>
Sun, 8 Nov 2009 22:31:20 +0000 (14:31 -0800)
committerBill Buzbee <buzbee@google.com>
Mon, 9 Nov 2009 20:24:12 +0000 (12:24 -0800)
commit9a8c75adb2abf551d06dbf757bff558c1feded08
tree280ae04b87432d1ddb153e79525ee49e5dfe9d7f
parent7044e3e1a19deeb045fb9e0a9cfeadb5edfce8ee
Introduce "just interpret" chainable pseudo-translation.

This is the first step towards enabling translation & self-cosim stress modes.
When trace selection begins, the trace head address is pinned and
remains in a limbo state until the translation is complete.  Previously,
if the trace selected aborted for any reason, the trace head would remain
forever in limbo.  This was not a correctness problem, but caused some
small performance anomolies and made life more difficult for self-cosimulation
mode.

This CL introduces a pseudo-translation that simply routes control to
the interpreter.  When we detect that a trace selection attempt has
failed, the trace head is associated with this fully-chainable
pseudo-translation.  This also has the benefit for self-cosimulation that
we are guaranteed forward progress.
23 files changed:
vm/Globals.h
vm/compiler/codegen/arm/Assemble.c
vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
vm/compiler/codegen/arm/armv5te/ArchVariant.c
vm/compiler/codegen/arm/armv7-a/ArchVariant.c
vm/compiler/template/armv5te-vfp/TemplateOpList.h
vm/compiler/template/armv5te/TEMPLATE_INTERPRET.S [new file with mode: 0644]
vm/compiler/template/armv5te/TemplateOpList.h
vm/compiler/template/armv5te/header.S
vm/compiler/template/armv7-a/TemplateOpList.h
vm/compiler/template/config-armv5te-vfp
vm/compiler/template/config-armv7-a
vm/compiler/template/out/CompilerTemplateAsm-armv5te-vfp.S
vm/compiler/template/out/CompilerTemplateAsm-armv5te.S
vm/compiler/template/out/CompilerTemplateAsm-armv7-a.S
vm/interp/InterpDefs.h
vm/interp/Jit.c
vm/interp/Jit.h
vm/mterp/armv5te/footer.S
vm/mterp/out/InterpAsm-armv4t.S
vm/mterp/out/InterpAsm-armv5te-vfp.S
vm/mterp/out/InterpAsm-armv5te.S
vm/mterp/out/InterpAsm-armv7-a.S