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locking/atomic: Fix atomic_set_release() for 'funny' architectures
authorPeter Zijlstra <peterz@infradead.org>
Fri, 9 Jun 2017 11:05:06 +0000 (13:05 +0200)
committerIngo Molnar <mingo@kernel.org>
Thu, 10 Aug 2017 10:28:54 +0000 (12:28 +0200)
commit9d664c0aec3bfdb77fcf7de61cfe1febbecdd389
tree58c96472de25e0ebcbf2f47b7a53d262edcb3e94
parent35a2897c2a306cca344ca5c0b43416707018f434
locking/atomic: Fix atomic_set_release() for 'funny' architectures

Those architectures that have a special atomic_set implementation also
need a special atomic_set_release(), because for the very same reason
WRITE_ONCE() is broken for them, smp_store_release() is too.

The vast majority is architectures that have spinlock hash based atomic
implementation except hexagon which seems to have a hardware 'feature'.

The spinlock based atomics should be SC, that is, none of them appear to
place extra barriers in atomic_cmpxchg() or any of the other SC atomic
primitives and therefore seem to rely on their spinlock implementation
being SC (I did not fully validate all that).

Therefore, the normal atomic_set() is SC and can be used at
atomic_set_release().

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Chris Metcalf <cmetcalf@mellanox.com> [for tile]
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: davem@davemloft.net
Cc: james.hogan@imgtec.com
Cc: jejb@parisc-linux.org
Cc: rkuo@codeaurora.org
Cc: vgupta@synopsys.com
Link: http://lkml.kernel.org/r/20170609110506.yod47flaav3wgoj5@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/arc/include/asm/atomic.h
arch/hexagon/include/asm/atomic.h
arch/metag/include/asm/atomic_lock1.h
arch/parisc/include/asm/atomic.h
arch/sparc/include/asm/atomic_32.h
arch/tile/include/asm/atomic_32.h
include/asm-generic/atomic64.h