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media: ccs-pll: Separate VT divisor limit calculation from the rest
authorSakari Ailus <sakari.ailus@linux.intel.com>
Tue, 15 Sep 2020 16:33:13 +0000 (18:33 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 15:03:56 +0000 (16:03 +0100)
commit9ec6e5b18e6660ccc7b1777a4a4108c6c1723c40
treece672ebd63bd35d62838f9b9a139fc06018eab11
parent36154b68b8d9c4a3d771c0d2c58be03927350480
media: ccs-pll: Separate VT divisor limit calculation from the rest

Separate VT divisor limit calculation from the rest of the VT PLL branch
calculation. This way it can be used for dual PLL support as well.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c