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hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
authorChris Rauer <crauer@google.com>
Fri, 22 Sep 2023 18:14:11 +0000 (18:14 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 19 Oct 2023 13:32:13 +0000 (14:32 +0100)
commit9ef2629712680e70cbf39d8b6cb1ec0e0e2e72fa
tree5ff22d3462fc16295e127422f8d6b419b23e0295
parent3a45f4f5376cad9489e1608f2e4960fd34805546
hw/timer/npcm7xx_timer: Prevent timer from counting down past zero

The counter register is only 24-bits and counts down.  If the timer is
running but the qtimer to reset it hasn't fired off yet, there is a chance
the regster read can return an invalid result.

Signed-off-by: Chris Rauer <crauer@google.com>
Message-id: 20230922181411.2697135-1-crauer@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/timer/npcm7xx_timer.c