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[X86] Force shuffle lowering to only create X86ISD::VPERM2X128 with 64-bit element...
authorCraig Topper <craig.topper@intel.com>
Thu, 7 Sep 2017 06:11:10 +0000 (06:11 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 7 Sep 2017 06:11:10 +0000 (06:11 +0000)
commit9f206fb20b8f7b145e35918b37c94b47ec5a5ad5
tree6110030619dd8b660389f719efd832be86d7d27e
parentca22b05483a2b3792ec75ec87dba1dfad124fe9c
[X86] Force shuffle lowering to only create X86ISD::VPERM2X128 with 64-bit element types so we can remove some patterns from isel.

Intrinsic handling is still creating these nodes with 32-bit elements as well. But at least this gets rid of 8 and 16.

Ideally, someday we'll convert the intrinsics to generic vector shuffles and remove the intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312702 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrSSE.td