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(parent: a5e98b0) | patch
arm64: tegra: Enable DFLL clock on Jetson TX1
authorJoseph Lo <josephl@nvidia.com>
Fri, 4 Jan 2019 03:06:59 +0000 (11:06 +0800)
committerThierry Reding <treding@nvidia.com>
Thu, 7 Feb 2019 18:03:09 +0000 (19:03 +0100)
commita1304d352cca26dc80b70c869848d3ea50f6a54f
tree263b84b87274d7d0393b477ccccd5312048ef24ftree | snapshot
parenta5e98b0b371c11bb49be0b661a03a04a5c3b1f44commit | diff
arm64: tegra: Enable DFLL clock on Jetson TX1

Enable DFLL clock for Jetson TX1 platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts diff | blob | history
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