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ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions
authorSaleem Abdulrasool <compnerd@compnerd.org>
Sun, 12 Jan 2014 04:36:01 +0000 (04:36 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Sun, 12 Jan 2014 04:36:01 +0000 (04:36 +0000)
commita2fce1169d8696f9950a17b1f85126b08c863154
tree7f5114b1d286e80a80e681cdd174507ec9d7860b
parent188fbacade4772757363045ab417927d525e57f6
ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions

The implicit immediate 0 forms are assembly aliases, not distinct instruction
encodings.  Fix the initial implementation introduced in r198914 to an alias to
avoid two separate instruction definitions for the same encoding.

An InstAlias is insufficient in this case as the necessary due to the need to
add a new additional operand for the implicit zero.  By using the AsmPsuedoInst,
fall back to the C++ code to transform the instruction to the equivalent
_POST_IMM form, inserting the additional implicit immediate 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199032 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrFormats.td
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
test/MC/ARM/arm_addrmode2.s
test/MC/Disassembler/ARM/addrmode2-reencoding.txt