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(parent: 5047ab9) | patch
drm/msm/dsi_pll_10nm: restore VCO rate during restore_state
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 15 Oct 2020 19:03:30 +0000 (22:03 +0300)
committerRob Clark <robdclark@chromium.org>
Wed, 4 Nov 2020 16:26:25 +0000 (08:26 -0800)
commita4ccc37693a271330a46208afbeaed939d54fdbb
treea4447a05979362c7f5892a08d2471d5e84d2e630tree | snapshot
parent5047ab95bb7db0e7b2ecfd5e9bcafc7fd822c652commit | diff
drm/msm/dsi_pll_10nm: restore VCO rate during restore_state

PHY disable/enable resets PLL registers to default values. Thus in
addition to restoring several registers we also need to restore VCO rate
settings.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: c6659785dfb3 ("drm/msm/dsi/pll: call vco set rate explicitly")
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c diff | blob | history
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