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(parent: c1e674e) | patch
[ARM] Fixed an assumption of power-of-2 vector MVT
authorTim Renouf <tpr.llvm@botech.co.uk>
Sun, 17 Mar 2019 20:48:54 +0000 (20:48 +0000)
committerTim Renouf <tpr.llvm@botech.co.uk>
Sun, 17 Mar 2019 20:48:54 +0000 (20:48 +0000)
commita4f465e4c73c4d866a444b19eb51456d1d9f10d1
treeddd7cca29e578f9aa7937770dd85d321067d8b6atree | snapshot
parentc1e674eb387e6c1b9ca4c29209ccf651335edd25commit | diff
[ARM] Fixed an assumption of power-of-2 vector MVT

I am about to introduce some non-power-of-2 width vector MVTs. This
commit fixes a power-of-2 assumption that my forthcoming change would
otherwise break, as shown by test/CodeGen/ARM/vcvt_combine.ll and
vdiv_combine.ll.

Differential Revision: https://reviews.llvm.org/D58927

Change-Id: I56a282e365d3874ab0621e5bdef98a612f702317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356341 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
external/llvm
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