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ARM: mvebu: conditionalize Armada 375 SMP workaround
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Mon, 5 May 2014 15:05:25 +0000 (17:05 +0200)
committerJason Cooper <jason@lakedaemon.net>
Thu, 8 May 2014 16:40:15 +0000 (16:40 +0000)
commita58d5af7d992a5e6dd8e55b3e618bd77f0368b57
treed1d3ee23ab0ae8838bc14b3e63071957dddaa5f4
parent5093dcfb422d212ccdd22450bd986a2fb03cfb9f
ARM: mvebu: conditionalize Armada 375 SMP workaround

The Armada 375 SMP workaround only needs to be applied to the Z1
revision of the SoC. The A0 and later revisions have been fixed, and
no longer need this workaround.

Note that the initialization of the SMP workaround is delayed from
->smp_prepare_cpus() to ->smp_boot_secondary() because when
->smp_prepare_cpus() is called, the early initcalls have not be
called, so the mvebu-soc-id mechanism is not operational. Since the
workaround is anyway not needed before the secondary CPU is started,
we can delay its implementation until the ->smp_boot_secondary() call.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/mach-mvebu/platsmp-a9.c