Merging r369095:
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r369095 | lewis-revill | 2019-08-16 12:28:34 +0200 (Fri, 16 Aug 2019) | 11 lines
[RISCV] Lower inline asm constraint A for RISC-V
This allows arguments with the constraint A to be lowered to input nodes
for RISC-V, which implies a memory address stored in a register.
This patch adds the minimal amount of code required to get operands with
the right constraints to compile.
https://reviews.llvm.org/D54296
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@369651
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