OSDN Git Service

[ARM] Add MVE 64-bit GPR <-> vector move instructions.
authorSimon Tatham <simon.tatham@arm.com>
Fri, 21 Jun 2019 13:17:23 +0000 (13:17 +0000)
committerSimon Tatham <simon.tatham@arm.com>
Fri, 21 Jun 2019 13:17:23 +0000 (13:17 +0000)
commita93c9e0cb25d33595493d8988c79beb6c61c4a3c
tree7b7bab84d4365689c30abeb3946c38cba180f8f0
parent4dca57f2e9fc74cc6d8eef255651275dbfd0aa2f
[ARM] Add MVE 64-bit GPR <-> vector move instructions.

These instructions let you load half a vector register at once from
two general-purpose registers, or vice versa.

The assembly syntax for these instructions mentions the vector
register name twice. For the move _into_ a vector register, the MC
operand list also has to mention the register name twice (once as the
output, and once as an input to represent where the unchanged half of
the output register comes from). So we can conveniently assign one of
the two asm operands to be the output $Qd, and the other $QdSrc, which
avoids confusing the auto-generated AsmMatcher too much. For the move
_from_ a vector register, there's no way to get round the fact that
both instances of that register name have to be inputs, so we need a
custom AsmMatchConverter to avoid generating two separate output MC
operands. (And even that wouldn't have worked if it hadn't been for
D60695.)

Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62679

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364041 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMInstrMVE.td
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
test/MC/ARM/mve-vmov-pair.s [new file with mode: 0644]
test/MC/Disassembler/ARM/mve-vmov-pair.txt [new file with mode: 0644]