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[Power9] Add exploitation of non-permuting memory ops
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 22 Sep 2016 09:52:19 +0000 (09:52 +0000)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 22 Sep 2016 09:52:19 +0000 (09:52 +0000)
commita941fe247ef597fbc9f449adb8bc02f5a9e32863
tree82b06a913ddadb0590e41b1df90fff5f139ac1b5
parent5b1a39068cd1fcf0668f9d818faf77b7a8ac7608
[Power9] Add exploitation of non-permuting memory ops

This patch corresponds to review:
https://reviews.llvm.org/D19825

The new lxvx/stxvx instructions do not require the swaps to line the elements
up correctly. In order to select them over the lxvd2x/lxvw4x instructions which
require swaps, the patterns for the old instruction have a predicate that
ensures they won't be selected on Power9 and newer CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282143 91177308-0d34-0410-b5e6-96231b3b80d8
15 files changed:
lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCInstrVSX.td
lib/Target/PowerPC/PPCSubtarget.h
test/CodeGen/PowerPC/lxvw4x-bug.ll
test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll
test/CodeGen/PowerPC/ppc64-i128-abi.ll
test/CodeGen/PowerPC/swaps-le-1.ll
test/CodeGen/PowerPC/swaps-le-6.ll
test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll
test/CodeGen/PowerPC/vsx-ldst.ll
test/CodeGen/PowerPC/vsx-p9.ll [new file with mode: 0644]
test/CodeGen/PowerPC/vsx_insert_extract_le.ll
test/CodeGen/PowerPC/vsx_shuffle_le.ll