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AMDGPU: Match load d16 hi instructions
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 20 Sep 2017 05:01:53 +0000 (05:01 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 20 Sep 2017 05:01:53 +0000 (05:01 +0000)
commita942315e5fd95f34dada8700461bcc2638e0358f
treeeae79bcd1682e5ce7bd9a9e22410e04b11d93b5e
parenta35447062dc441adc6ab4ca0174334051f3523e1
AMDGPU: Match load d16 hi instructions

Also starts selecting global loads for constant address
in some cases. Some end up selecting to mubuf still, which
requires investigation.

We still get sub-optimal regalloc and extra waitcnts inserted
due to not really tracking the liveness of the separate register
halves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313716 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
lib/Target/AMDGPU/AMDGPUInstructions.td
lib/Target/AMDGPU/BUFInstructions.td
lib/Target/AMDGPU/DSInstructions.td
lib/Target/AMDGPU/FLATInstructions.td
test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
test/CodeGen/AMDGPU/fabs.f16.ll
test/CodeGen/AMDGPU/load-hi16.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/packed-op-sel.ll
test/CodeGen/AMDGPU/sext-in-reg.ll