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[InstCombine] Use less bitwise operations to handle Instruction::SExt in SimplifyDema...
authorCraig Topper <craig.topper@gmail.com>
Wed, 24 May 2017 17:33:30 +0000 (17:33 +0000)
committerCraig Topper <craig.topper@gmail.com>
Wed, 24 May 2017 17:33:30 +0000 (17:33 +0000)
commita9efa933622808b2af521b17bdca8e2df68e8d0c
treeec7c8c6371da64d95846d375f3488855d8604da5
parenta1adbd39e93690dc6db061a4d17423112d8105bc
[InstCombine] Use less bitwise operations to handle Instruction::SExt in SimplifyDemandedUseBits. Other improvements.

The current code created a NewBits mask and used it as a mask several times. One of them just before a call to trunc making it unnecessary. A call to getActiveBits can get us the same information for the case. We also ORed with this mask later when we should have just sign extended the known bits.

We also called trunc on the guaranteed to be zero KnownZeros/Ones masks entering this code. Creating appropriately sized temporary APInts is probably better.

Differential Revision: https://reviews.llvm.org/D32098

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303779 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp