ASoC: SOF: Intel: hda: do not leave clock gating off upon error
The misc clock gating (MISCBDCGE) is disabled for controller reset and
reenabled once reset is complete.
Fix the case when error happens during reset, and clock gating is
left disabled. The clock gating should be reenabled also in this case.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20200325211233.27394-5-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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