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[X86][SSE] Support v16i8/v32i8 vector rotations
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 29 Jun 2018 09:36:39 +0000 (09:36 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 29 Jun 2018 09:36:39 +0000 (09:36 +0000)
commitab4b844b3e6fb7b05850d82d7e0faba2b3a72647
tree5777274727f1c726416ed706c86d7d7e9e648abc
parent663484452ecf2000001548dfd28c5f816e2aa8b7
[X86][SSE] Support v16i8/v32i8 vector rotations

This uses the same technique as for shifts - split the rotation into 4/2/1-bit partial rotations and select those partials based on the amount bit, making use of PBLENDVB if available. This halves the use of PBLENDVB compared to expanding to shifts, which can be a slow op.

Unfortunately I haven't found a decent way to share much of this code with the shift equivalent.

Differential Revision: https://reviews.llvm.org/D48655

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335957 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/vector-rotate-128.ll
test/CodeGen/X86/vector-rotate-256.ll
test/CodeGen/X86/vector-rotate-512.ll