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arm64: tlb: Avoid synchronous TLBIs when freeing page tables
authorWill Deacon <will.deacon@arm.com>
Thu, 23 Aug 2018 20:16:50 +0000 (21:16 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Tue, 11 Sep 2018 15:49:12 +0000 (16:49 +0100)
commitace8cb754539077ed75f3f15b77b2b51b5b7a431
treebab41795267bc907a837e48799405ee489672604
parentf270ab88fdf205be1a7a46ccb61f4a343be543a2
arm64: tlb: Avoid synchronous TLBIs when freeing page tables

By selecting HAVE_RCU_TABLE_INVALIDATE, we can rely on tlb_flush() being
called if we fail to batch table pages for freeing. This in turn allows
us to postpone walk-cache invalidation until tlb_finish_mmu(), which
avoids lots of unnecessary DSBs and means we can shoot down the ASID if
the range is large enough.

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/Kconfig
arch/arm64/include/asm/tlb.h
arch/arm64/include/asm/tlbflush.h