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target/ppc: Honor fpscr_ze semantics and tidy fdiv
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 3 Jul 2018 15:17:27 +0000 (08:17 -0700)
committerDavid Gibson <david@gibson.dropbear.id.au>
Tue, 21 Aug 2018 04:28:45 +0000 (14:28 +1000)
commitae13018d79fb4db7c6a648617bfa0d5976f6e47d
treef40672d98a99d47db423bcdad90f2ba0bcd828e5
parente82c42b7c5c1acbcfd5e5fe2b1b850c56e619c0d
target/ppc: Honor fpscr_ze semantics and tidy fdiv

Divide by zero, exception taken, leaves the destination register
unmodified.  Therefore we must raise the exception before returning
from helper_fdiv.  Move the check from do_float_check_status into
helper_fdiv.

At the same time, tidy the invalid exception checking so that we
rely on softfloat for initial argument validation, and select the
kind of invalid operand exception only when we know we must.

At the same time, pass and return float64 values directly rather
than bounce through the CPU_DoubleU union.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
target/ppc/fpu_helper.c
target/ppc/helper.h