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target/arm: Fix SVE STR increment
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 31 Oct 2023 14:32:15 +0000 (07:32 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 2 Nov 2023 13:36:45 +0000 (13:36 +0000)
commitb11293c212c2927fcea1befc50dabec9baba4fcc
tree074fa995c448d003c909deaa5f7a609e0b65cd0b
parent854c001f121578c96b023b5db0c5550250505a0e
target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps.  Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231031143215.29764-1-richard.henderson@linaro.org
[PMM: fixed checkpatch nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/tcg/translate-sve.c
tests/tcg/aarch64/Makefile.target
tests/tcg/aarch64/sve-str.c [new file with mode: 0644]