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target/i386: Enable TSX Suspend Load Address Tracking feature
authorCathy Zhang <cathy.zhang@intel.com>
Sun, 5 Jul 2020 23:17:16 +0000 (07:17 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 10 Jul 2020 23:26:55 +0000 (19:26 -0400)
commitb3c7344e338b04be9feaf7ac6693c2f7fc951b89
tree59c4411f3e118aaf5e20eea3044cb8af752f921f
parent5dd13f2a5b4d7335b2b0924e6fb28b63b34e70fe
target/i386: Enable TSX Suspend Load Address Tracking feature

This instruction aims to give a way to choose which memory accesses
do not need to be tracked in the TSX read set, which is defined as
CPUID.(EAX=7,ECX=0):EDX[bit 16].

The release spec link is as follows:
https://software.intel.com/content/dam/develop/public/us/en/documents/\
architecture-instruction-set-extensions-programming-reference.pdf

The associated kvm patch link is as follows:
https://lore.kernel.org/patchwork/patch/1268026/

Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
Message-Id: <1593991036-12183-3-git-send-email-cathy.zhang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/cpu.c
target/i386/cpu.h