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[X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 24 Mar 2018 14:51:52 +0000 (14:51 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 24 Mar 2018 14:51:52 +0000 (14:51 +0000)
commitb5d6a0f78a299924f9a08788abff1abd9bfea653
tree432691a4ba80cbfcba6bf1e21cb0f1f0f103a4fd
parent905503826cb9c29e8ed02e9b66d59b29ee9a46f3
[X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on AVX targets

And ensure we don't use later instruction sets in SSE schedule tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328423 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/sse-schedule.ll
test/CodeGen/X86/sse2-schedule.ll
test/CodeGen/X86/sse3-schedule.ll
test/CodeGen/X86/sse41-schedule.ll
test/CodeGen/X86/sse42-schedule.ll
test/CodeGen/X86/ssse3-schedule.ll