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nvme-pci: dma read memory barrier for completions
authorKeith Busch <kbusch@kernel.org>
Fri, 8 May 2020 20:04:06 +0000 (13:04 -0700)
committerChristoph Hellwig <hch@lst.de>
Tue, 12 May 2020 16:02:24 +0000 (18:02 +0200)
commitb69e2ef24b7b4867f80f47e2781e95d0bacd15cb
tree849b398f5ec603aa97bc6a1f6e387bfa90a7ba82
parent59c7c3caaaf8750df4ec3255082f15eb4e371514
nvme-pci: dma read memory barrier for completions

Control dependencies do not guarantee load order across the condition,
allowing a CPU to predict and speculate memory reads.

Commit 324b494c2862 inlined verifying a new completion with its
handling. At least one architecture was observed to access the contents
out of order, resulting in the driver using stale data for the
completion.

Add a dma read barrier before reading the completion queue entry and
after the condition its contents depend on to ensure the read order is
determinsitic.

Reported-by: John Garry <john.garry@huawei.com>
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Tested-by: John Garry <john.garry@huawei.com>
Acked-by: Will Deacon <will@kernel.org>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Christoph Hellwig <hch@lst.de>
drivers/nvme/host/pci.c