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drm/i915/hsw: add missing disabled EUs registers reads
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 21 Feb 2018 20:49:02 +0000 (20:49 +0000)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Thu, 22 Feb 2018 13:58:01 +0000 (13:58 +0000)
commitb8ec759e6f1c6da0418238df066a0f1ef8fd2075
tree1c06556b6f2ca15a6a187ae5c20c70101f3634cb
parent80d893501bb6b28d838b8d45ec47ed0de8482736
drm/i915/hsw: add missing disabled EUs registers reads

It turns out that HSW has a register that tells us how many EUs are
disabled per half-slice (roughly a similar notion to subslice). We
didn't read those registers so far as most userspace drivers didn't
need those values prior to Gen8, but an internal library would like to
have access to this.

Since we already have the getparam interface, there is no harm in
exposing this.

v2: Rename bits value (Joonas)

v3: s/GEM_BUG_ON/MISSING_CASE/ (Joonas)

v4: s/GEM_BUG_ON/MISSING_CASE/ again... (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221204902.23084-1-lionel.g.landwerlin@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_device_info.c