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clk: samsung: exynos5420: Add VPLL rate table
authorMarian Mihailescu <mihailescu2m@gmail.com>
Tue, 29 Oct 2019 00:47:58 +0000 (11:17 +1030)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Tue, 29 Oct 2019 10:31:20 +0000 (11:31 +0100)
commitb92981de92cbbb93c80bbe800d6c3b32f0911641
tree99adf12658ec9b573fe49a3785fafa1bddb377fetree | snapshot
parente9323b664ce29547d996195e8a6129a351c39108commit | diff
clk: samsung: exynos5420: Add VPLL rate table

Add new table rate for VPLL for Exynos 542x SoC required to support
Mali GPU clock frequencies.

Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5420.c diff | blob | history
This is a test repository.
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