OSDN Git Service

media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
authorVishal Sagar <vishal.sagar@xilinx.com>
Wed, 27 May 2020 13:57:19 +0000 (15:57 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 23 Jun 2020 11:11:46 +0000 (13:11 +0200)
commitba5bf51acf0075b193878a56ea3741982391da9c
treeba4e31aba02481102760e5913c03a22197fb13a9
parent9e5eb9a451837946d93e077e0bf02bfcd203e4be
media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver

The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images
from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready
for image processing. Please refer to PG232 for details.

The CSI2 Rx controller filters out all packets except for the packets
with data type fixed in hardware. RAW8 packets are always allowed to
pass through.

It is also used to setup and handle interrupts and enable the core. It
logs all the events in respective counters between streaming on and off.

The driver supports only the video format bridge enabled configuration.
Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when the
CSI v2.0 feature is enabled in design. When the VCX feature is enabled,
the maximum number of virtual channels becomes 16 from 4.

Signed-off-by: Vishal Sagar <vishal.sagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/platform/xilinx/Kconfig
drivers/media/platform/xilinx/Makefile
drivers/media/platform/xilinx/xilinx-csi2rxss.c [new file with mode: 0644]