OSDN Git Service

drm/msm/dp: Support up to 3 DP controllers
authorBjorn Andersson <bjorn.andersson@linaro.org>
Sat, 16 Oct 2021 22:18:41 +0000 (15:18 -0700)
committerRob Clark <robdclark@chromium.org>
Mon, 18 Oct 2021 21:28:30 +0000 (14:28 -0700)
commitbb3de286d9921c168f5dfd4097aca691662a3def
tree72eb73f59e0ef73beb8acdd9d003294a7c2826f5
parent4b296d15b355a866504e60af85ebb72b47873206
drm/msm/dp: Support up to 3 DP controllers

Based on the removal of the g_dp_display and the movement of the
priv->dp lookup into the DP code it's now possible to have multiple
DP instances.

In line with the other controllers in the MSM driver, introduce a
per-compatible list of base addresses which is used to resolve the
"instance id" for the given DP controller. This instance id is used as
index in the priv->dp[] array.

Then extend the initialization code to initialize struct drm_encoder for
each of the registered priv->dp[] and update the logic for associating
each struct msm_dp with the struct dpu_encoder_virt.

A new enum is introduced to document the connection between the
instances referenced in the dpu_intf_cfg array and the controllers in
the DP driver and sc7180 is updated.

Lastly, bump the number of struct msm_dp instances carries by priv->dp
to 3, the currently known maximum number of controllers found in a
Qualcomm SoC.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20211016221843.2167329-6-bjorn.andersson@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
drivers/gpu/drm/msm/dp/dp_display.c
drivers/gpu/drm/msm/msm_drv.h