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[AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX512...
authorCraig Topper <craig.topper@gmail.com>
Mon, 5 Sep 2016 06:43:06 +0000 (06:43 +0000)
committerCraig Topper <craig.topper@gmail.com>
Mon, 5 Sep 2016 06:43:06 +0000 (06:43 +0000)
commitbda8c85789eb050bfbd864924da5d8c0e321dd07
treed440151dcb33563fed674acbd4d9a96a030a3d4f
parent481ecf26d0de1ddc401d80515e2e2dd79e2e26a8
[AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX512, but not VLX. We should use the VEX opcodes and trust the register allocator to not use the extended XMM/YMM register space.

Previously we were extending to copying the whole ZMM register. The register allocator shouldn't use XMM16-31 or YMM16-31 in this configuration as the instructions to spill them aren't available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280648 91177308-0d34-0410-b5e6-96231b3b80d8
14 files changed:
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86RegisterInfo.cpp
lib/Target/X86/X86RegisterInfo.h
test/CodeGen/X86/avx512-calling-conv.ll
test/CodeGen/X86/avx512-ext.ll
test/CodeGen/X86/avx512-intrinsics.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-select.ll
test/CodeGen/X86/avx512-vbroadcast.ll
test/CodeGen/X86/masked_gather_scatter.ll
test/CodeGen/X86/masked_memop.ll
test/CodeGen/X86/pmul.ll
test/CodeGen/X86/vector-sext.ll
test/CodeGen/X86/vector-zext.ll