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AMDGPU: Hack for VS_32 register pressure
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 6 Nov 2015 17:54:43 +0000 (17:54 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 6 Nov 2015 17:54:43 +0000 (17:54 +0000)
commitbf0ce512c5ecaff0631b0c12ff85b0d3e2b5de12
treec1ac06693555a9607294e175e5db3dc7db48e01b
parent99ee897f5441f6bc2d70ef24f92cd9c37269cd41
AMDGPU: Hack for VS_32 register pressure

For some reason VS_32 ends up factoring into the pressure heuristics
even though we should never see a virtual register with this class.

When SGPRs are reserved for register spilling, this for some reason
triggers reg-crit scheduling.

Setting isAllocatable = 0 may help with this since that seems to remove
it from the default implementation's generated table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252321 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIRegisterInfo.cpp
lib/Target/AMDGPU/SIRegisterInfo.h
test/CodeGen/AMDGPU/salu-to-valu.ll
test/CodeGen/AMDGPU/valu-i1.ll