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(parent: 5caa183) | patch
i386: implement IGNNE
authorPaolo Bonzini <pbonzini@redhat.com>
Wed, 16 Oct 2019 08:34:39 +0000 (10:34 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Sat, 26 Oct 2019 13:38:07 +0000 (15:38 +0200)
commitbf13bfab0840d34a74938ddf567d52e9010dbdc6
tree2743c5d7e769c7da29ddc7fcdb795a869514668etree | snapshot
parent5caa1833d22c2f3c3f08c80d9bf86dccf9aa25a4commit | diff
i386: implement IGNNE

Change the handling of port F0h writes and FPU exceptions to implement IGNNE.

The implementation mixes a bit what the chipset and processor do in real
hardware, but the effect is the same as what happens with actual FERR#
and IGNNE# pins: writing to port F0h asserts IGNNE# in addition to lowering
FP_IRQ; while clearing the SE bit in the FPU status word deasserts IGNNE#.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
hw/i386/pc.c diff | blob | history
target/i386/cpu.h diff | blob | history
target/i386/fpu_helper.c diff | blob | history
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