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(parent: 6a8cc66) | patch
drm/i915/perf: fix whitelist on Gen10+
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Sat, 1 Jun 2019 22:58:45 +0000 (01:58 +0300)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Mon, 10 Jun 2019 08:48:24 +0000 (11:48 +0300)
commitbf210f6c9e6fd8dc0d154ad18f741f20e64a3fce
tree1e38e98c1d0f8fca686db81592a74ba9b8e66623tree | snapshot
parent6a8cc66ffe0fc87b0df10405ceb107f64795c28bcommit | diff
drm/i915/perf: fix whitelist on Gen10+

Gen10 added an additional NOA_WRITE register (high bits) and we forgot
to whitelist it for userspace.

Fixes: 95690a02fb5d96 ("drm/i915/perf: enable perf support on CNL")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190601225845.12600-1-lionel.g.landwerlin@intel.com
drivers/gpu/drm/i915/i915_perf.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
This is a test repository.
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